DFS Issue 2 Version Information

G4HUP F-DFS Issue 2 Version 123MHz

Note - these recommendations have not been proven by me yet! They are offered for assistance in implementing a 123MHz version (customer request). Once confirmed any necessary changes will be made to this document.

Configuration Document download here

PCB Preparation

Error issue see Errata. You need to correct item 1

PCB must have the following modifications carried out during assembly:

it is recommended that a diplexer is used after the VHF BPF
If using S18 inductors, prepare shielding for both of the VHF BPF's - for L205/206, use a piece of hobby brass 67mm x 17mm. Fold each end in at 17.5mm. Cut a screen to fit centrally between the two coils. For L601/602, the procedure is identical - but the screen is 61mm long before bending.

Circuit Realisation

The 123MHz version requires:

the diode multiplier (Sheet 2),
Logic Stages with 1 divider (IC402) - both inverter packages (IC401/404) required (Sheet 4)
10MHz low pass filter, (Sheet 9)
1MHz low pass filter (sheet 3)
11MHz BPF and tripler to 33MHz (Sheet 5)
123MHz BPF/diplexer, amplifiers, crystal filter and output LPF (Sheets 6 & 7)

The input buffer circuit (Sheet 1) can be used to provide a 'daisy-chain' 10MHz output with this implementation.

Filters and Attenuators

Filters

The Input Buffer input attenuator (Atten 1) should be set for 7dB if the drive level available is +10dBm - Adjust the value according to your input signal to obtain +10dBm at the input to the diode multiplier.

Set the attenuator following the VHF multiplier chain to give around 0dBm into the mixer RF port - often between 3 and 6dB is the correct value here.

The attenuators following SJ302 and SJ902 should be set to give a level of approx +6dBm into the mixer RF and LO ports.

Attenuators through the 123MHz part of the circuit should be set to give the hihest output level whilst maintaining linear operation of the stages.

Divider Programming

Divider 1 (IC402) must be set to divide by 10 to give 1MHz output - hence the jumpers must be programmed as binary 6 (0110) reading in order DCBA. Jumper A and D (pins 3, SJ1, and 6, SJ4) must be grounded, the remaining 2 taken to the 10k pull-up resistor, R403

Divider 2 (IC403) is not required. Instead pins 2 and 12 should be bridged on the PCB underside. SJ15 should also be bridged with solder to connect the 10MHz output through to IC404D and SJ301

Divider Outputs: Divider 1 output is taken from pin 14 (SJ5).

SJ17 connect centre to end nearest IC401 SJ18 no connections required

Mixer Choices

Standard ADE-1 mixer required for M601, M501

Alignment

Tune each filter onto frequency using a signal generator and power meter or spectrum analyser as you go through the construction. This will ease the final tune up. As you complete each chain, adjust it before the mixer is inserted.

For example, build the 90MHz filter, align it, then build the amplifier stages following. Check and re-align. Build the diode multiplier and test through to output of the amplifiers. Set the attenuator value to give approx +6dBm into the mixer. Build the logic stages and check the output is correct in frequency. Using a scope, check that there is a nice square wave output from IC401, pin 2 (may be easier to look at IC402 pin2) Check output of divider through LPF - you should see approx +12dBm (>7vp-p) of 10MHz present, and approx +6.5dBm (5vp-p) of 1MHz. The 10MHz signal needs a 6dB attenuator before the mixer. No attenuator is needed on the 1MHz signal.

Build and check the 11MHz BPF before installing M501. Check the tripler to 33MHz. - the output will be approx -10dBm. An extra gain stage was grafted in using a BGA616 (Siemens) to give +5dBm into M601. Adjust L504 and L505 for best symmetry at 16.5MHz.

Build the 123MHz BPF/diplexer and align it - the series path is set for max 123MHz signal, and the shunt path is set for minimum 57MHz. Once both the 90MHz and 33MHz outputs are optimised, insert the mixer and check the output through the Diplexer and BPF, optimising if necessary. Follow through with the remaining filters.

Final alignment should be done on a spectrum analyser. Carefully adjust the trimmer capacitors of the crystal filter for minimum spurii, and maximum wanted signal. The adjustments are iterative, and very small movements make significant differences to the output. You may also find it beneficial to make minor adjustments to the 90MHz filter and the 33MHz filter to get the best rejection of other products.

Options

Because this DFS implementation uses widely spaced LO and RF signals at the VHF mixer (M601) it is advantageous to provide a diplexer, to correctly terminate the unwanted products from the mixing process - the image output, and the LO feedthrough. This reduces the levels of spurious components present in the final stages of the DFS circuitry, and also helps to keep the following LO multiplier chain cleaner.

Page created 21 Nov 2008

Page last updated 21 Nov 2008